Freescale MPC565MVR56 32 Bit Microcontroller

The MPC565 is a member of the MPC500 family of microprocessors that implements the Power Architecture instruction standard architecture. The MPC565 is integrated with a floating point unit, an advanced peripheral set and 1 MB of flash memory on a single chip. This combination is ideal for high-performance automotive applications as well as other control-intensive applications.

• 1 MB of internal Flash memory (divided into two blocks of 512 KB)
• 36 KB static RAM
• Three time processor units (TPU3)
• A 22-timer channel modular I/O system (MIOS14)
• Three TouCAN modules
• Two queued serial multi-channel modules
• A NEXUS debug port (class 3) – IEEE®ISTO 5001-1999
• JTAG and background debug mode (BDM)
• Two enhanced queued analogue systems with multiplexors for 40 analogue channels
• A J1850 (DLCMD2) communications module

Freescale 32-bit MCU, Power Arch core, 1MB Flash, 40MHz, -40/+125degC, Automotive Grade, PBGA 388